16 search results - page 1 / 4 » Dynamic clock calibration via temperature measurement |
65
Voted
CDC
2009
IEEE
15 years 3 months ago
2009
IEEE
— We study a clock calibration problem for an ultra-low power timer on a sensor node platform. When the sensor is put into sleep mode, this timer is the only thing left running, ...
122
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MOBISYS
2011
ACM
14 years 1 months ago
2011
ACM
Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
—Fast frequency acquisition is crucial for phase-locked loops (PLLs) used in portable devices, as on-chip clocks are frequently scaled down or up in order to manage power consump...
82
Voted
IMC
2004
ACM
15 years 3 months ago
2004
ACM
Accurate, reliable timestamping which is also convenient and inexpensive is needed in many important areas including real-time network applications and network measurement. Recent...
FPT
2005
IEEE
15 years 4 months ago
2005
IEEE
A methodology for supporting dynamic voltage scaling (DVS) on commercial FPGAs is described. A logic delay measurement circuit (LDMC) is used to determine the speed of an inverter...