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» Dynamic hardware software partitioning: a first approach
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CODES
2011
IEEE
13 years 11 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
ICSM
2002
IEEE
15 years 4 months ago
Run-time Evolution for Embedded Component-Oriented Systems
This position paper describes ongoing work in which the Java-based SEESCOA component system is extended with functionality for run-time evolution. First, an assessment is made of ...
Yves Vandewoude, Yolande Berbers
CAV
2006
Springer
95views Hardware» more  CAV 2006»
15 years 3 months ago
Yasm: A Software Model-Checker for Verification and Refutation
Example Guided Abstraction Refinement (CEGAR) [6] framework. A number of wellengineered software model-checkers are available, e.g., SLAM [1] and BLAST [12]. Why build another one?...
Arie Gurfinkel, Ou Wei, Marsha Chechik
CGO
2004
IEEE
15 years 3 months ago
The Accuracy of Initial Prediction in Two-Phase Dynamic Binary Translators
Dynamic binary translators use a two-phase approach to identify and optimize frequently executed code dynamically. In the first step (profiling phase), blocks of code are interpre...
Youfeng Wu, Mauricio Breternitz Jr., Justin Quek, ...
HPCA
2006
IEEE
16 years 7 days ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...