150 search results - page 11 / 30 » ECO timing optimization using spare cells |
119
click to vote
ASPDAC
2006
ACM
15 years 7 months ago
2006
ACM
− In this paper, we present a new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed th...
109
click to vote
VLSID
1999
IEEE
15 years 6 months ago
1999
IEEE
We describe an improved iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. The speed and accuracy of our approach mak...
118
click to vote
GECCO
2007
Springer
15 years 8 months ago
2007
Springer
This paper introduces a continuous model for Multi-cellular Developmental Design. The cells are fixed on a 2D grid and exchange ”chemicals” with their neighbors during the gr...
122
click to vote
ICCAD
2008
IEEE
15 years 10 months ago
2008
IEEE
Abstract— Power consumption has become a crucial problem in modern circuit design. Multiple Supply Voltage (MSV) design is introduced to provide higher flexibility in controllin...
114
click to vote
VISUALIZATION
1998
IEEE
15 years 6 months ago
1998
IEEE
Many high-performance isosurface extraction algorithms have been proposed in the past several years as a result of intensive research efforts. When applying these algorithms to la...