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IPPS
2007
IEEE
15 years 4 months ago
Improving Data Access Performance with Server Push Architecture
Data prefetching, where data is fetched before CPU demands for it, has been considered as an effective solution to mask data access latency. However, the current client-initiated ...
Xian-He Sun, Surendra Byna, Yong Chen
IPPS
1998
IEEE
15 years 2 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
TWC
2008
87views more  TWC 2008»
14 years 9 months ago
A token-based scheduling scheme for WLANs supporting voice/data traffic and its performance analysis
Most of the existing medium access control (MAC) protocols for wireless local area networks (WLANs) provide prioritized access by adjusting the contention window sizes or interfram...
Ping Wang, Weihua Zhuang
DATE
2009
IEEE
95views Hardware» more  DATE 2009»
15 years 4 months ago
Minimization of NBTI performance degradation using internal node control
—Negative Bias Temperature Instability (NBTI) is a significant reliability concern for nanoscale CMOS circuits. Its effects on circuit timing can be especially pronounced for ci...
David R. Bild, Gregory E. Bok, Robert P. Dick
MICRO
1997
IEEE
108views Hardware» more  MICRO 1997»
15 years 2 months ago
Improving the Accuracy and Performance of Memory Communication Through Renaming
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
Gary S. Tyson, Todd M. Austin