In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...
We present a novel approach to estimate the time delay between light curves of multiple images in a gravitationally lensed system, based on Kernel methods in the context of machine...
Juan C. Cuevas-Tello, Peter Tino, Somak Raychaudhu...
In this paper, we address the problem of guaranteeing end-to-end (ETE) delay of packets in a distributed system where the technique of time division multiplex access (TDMA)is adop...
Current wired networks have been developed on the basis of the AIMD principle, which offers increased performance and fairness. Nevertheless, there is a vast spectrum of networks, ...