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» Effective Program Verification for Relaxed Memory Models
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PPL
2002
108views more  PPL 2002»
15 years 1 months ago
An Efficient Implementation of the BSP Programming Library for VIA
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of the promised high performance of VIA, previous MPI imp...
Yang-Suk Kee, Soonhoi Ha
LCTRTS
2009
Springer
15 years 8 months ago
Software transactional memory for multicore embedded systems
Embedded systems, like general-purpose systems, can benefit from parallel execution on a symmetric multicore platform. Unfortunately, concurrency issues present in general-purpos...
Jennifer Mankin, David R. Kaeli, John Ardini
HPCA
2005
IEEE
16 years 2 months ago
SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
Youtao Zhang, Lan Gao, Jun Yang 0002, Xiangyu Zhan...
IJFCS
2006
110views more  IJFCS 2006»
15 years 1 months ago
Sat-based Model Checking for Region Automata
For successful software verification, model checkers must be capable of handling a large number of program variables. Traditional, BDD-based model checking is deficient in this re...
Fang Yu, Bow-Yaw Wang
SPIN
2009
Springer
15 years 8 months ago
A Decision Procedure for Detecting Atomicity Violations for Communicating Processes with Locks
Abstract. We present a new decision procedure for detecting property violations in pushdown models for concurrent programs that use lock-based synchronization, where each thread’...
Nicholas Kidd, Peter Lammich, Tayssir Touili, Thom...