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TVLSI
2008
176views more  TVLSI 2008»
14 years 9 months ago
A Fuzzy Optimization Approach for Variation Aware Power Minimization During Gate Sizing
Abstract--Technology scaling in the nanometer era has increased the transistor's susceptibility to process variations. The effects of such variations are having a huge impact ...
Venkataraman Mahalingam, N. Ranganathan, J. E. Har...
SLIP
2009
ACM
15 years 4 months ago
Predicting the worst-case voltage violation in a 3D power network
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shaya...
VLDB
1987
ACM
92views Database» more  VLDB 1987»
15 years 1 months ago
Mind Your Grammar: a New Approach to Modelling Text
Beginning to create the New Oxford English Dictionary database has resulted in the realization that databases for reference texts are unlike those for conventional enterprises. Wh...
Gaston H. Gonnet, Frank Wm. Tompa
CORR
2010
Springer
105views Education» more  CORR 2010»
14 years 4 months ago
Universal and Robust Distributed Network Codes
Random linear network codes can be designed and implemented in a distributed manner, with low computational complexity. However, these codes are classically implemented [1] over fi...
Tracey Ho, Sidharth Jaggi, Svitlana Vyetrenko, Lin...
TC
2008
14 years 9 months ago
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
The design and performance of next-generation chip multiprocessors (CMPs) will be bound by the limited amount of power that can be dissipated on a single die. We present photonic n...
Assaf Shacham, Keren Bergman, Luca P. Carloni