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IPPS
2006
IEEE
15 years 3 months ago
Helper thread prefetching for loosely-coupled multiprocessor systems
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihi...
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
15 years 4 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
87
Voted
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
15 years 4 months ago
Energy efficient multiprocessor task scheduling under input-dependent variation
— In this paper, we propose a novel, energy aware scheduling algorithm for applications running on DVS-enabled multiprocessor systems, which exploits variation in execution times...
Jason Cong, Karthik Gururaj
83
Voted
IPPS
1999
IEEE
15 years 1 months ago
Portable Parallel Programming for the Dynamic Load Balancing of Unstructured Grid Applications
The ability to dynamically adapt an unstructured grid (or mesh) is a powerful tool for solving computational problems with evolving physical features; however, an efficient parall...
Rupak Biswas, Leonid Oliker, Sajal K. Das, Daniel ...
IEEEPACT
2009
IEEE
15 years 4 months ago
Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...
Abhishek Bhattacharjee, Margaret Martonosi