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» Efficient High-Level modeling in the networking domain
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FPGA
2006
ACM
111views FPGA» more  FPGA 2006»
15 years 1 months ago
FPGA clock network architecture: flexibility vs. area and power
This paper examines the tradeoffs between flexibility, area, and power dissipation of programmable clock networks for FieldProgrammable Gate Arrays (FPGA's). The paper begins...
Julien Lamoureux, Steven J. E. Wilton
CP
2006
Springer
15 years 1 months ago
Towards an Efficient SAT Encoding for Temporal Reasoning
Abstract. In this paper, we investigate how an IA network can be effectively encoded into the SAT domain. We propose two basic approaches to modelling an IA network as a CSP: one r...
Duc Nghia Pham, John Thornton, Abdul Sattar
IM
2003
14 years 11 months ago
A Scalable and Efficient Inter-domain QoS Routing Architecture for Diffserv Networks
: With Bandwidth Broker (BB) support in each domain, Differentiated Services (Diffserv) is seen as a key technology for achieving QoS guarantees in a scalable, efficient, and deplo...
Haci A. Mantar, Junseok Hwang, Steve J. Chapin, Ib...
AICOM
2004
92views more  AICOM 2004»
14 years 9 months ago
An efficient consistency algorithm for the Temporal Constraint Satisfaction Problem
Abstract. Dechter et al. [5] proposed solving the Temporal Constraint Satisfaction Problem (TCSP) by modeling it as a metaCSP, which is a finite CSP with a unique global constraint...
Berthe Y. Choueiry, Lin Xu
95
Voted
PRL
2011
14 years 4 months ago
Efficient approximate Regularized Least Squares by Toeplitz matrix
Machine Learning based on the Regularized Least Square (RLS) model requires one to solve a system of linear equations. Direct-solution methods exhibit predictable complexity and s...
Sergio Decherchi, Paolo Gastaldo, Rodolfo Zunino