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» Efficient Model Checking of PSL Safety Properties
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DAC
2005
ACM
16 years 18 days ago
Word level predicate abstraction and refinement for verifying RTL verilog
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
TOOLS
2000
IEEE
15 years 4 months ago
Testing-for-Trust: The Genetic Selection Model Applied to Component Qualification
This paper presents a method and a tool for building trustable OO components. The methodology is based on an integrated design and test approach for OO software components. It is ...
Benoit Baudry, Vu Le Hanh, Yves Le Traon
CODES
2006
IEEE
15 years 1 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
SPIN
2000
Springer
15 years 3 months ago
Verification and Optimization of a PLC Control Schedule
Abstract. We report on the use of model checking techniques for both the verification of a process control program and the derivation of optimal control schedules. Most of this wor...
Ed Brinksma, Angelika Mader
ICALP
2010
Springer
15 years 1 months ago
From Secrecy to Soundness: Efficient Verification via Secure Computation
d Abstract) Benny Applebaum1 , Yuval Ishai2 , and Eyal Kushilevitz3 1 Computer Science Department, Weizmann Institute of Science 2 Computer Science Department, Technion and UCLA 3 ...
Benny Applebaum, Yuval Ishai, Eyal Kushilevitz