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FPL
2006
Springer
242views Hardware» more  FPL 2006»
15 years 1 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
JTRES
2010
ACM
14 years 10 months ago
Cyclic executive for safety-critical Java on chip-multiprocessors
Chip-multiprocessors offer increased processing power at a low cost. However, in order to use them for real-time systems, tasks have to be scheduled efficiently and predictably. I...
Anders P. Ravn, Martin Schoeberl
KBSE
2007
IEEE
15 years 4 months ago
Sequential circuits for program analysis
A number of researchers have proposed the use of Boolean satisfiability solvers for verifying C programs. They encode correctness checks as Boolean formulas using finitization: ...
Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid
ACL
2010
14 years 7 months ago
Complexity Metrics in an Incremental Right-Corner Parser
Hierarchical HMM (HHMM) parsers make promising cognitive models: while they use a bounded model of working memory and pursue incremental hypotheses in parallel, they still achieve...
Stephen Wu, Asaf Bachrach, Carlos Cardenas, Willia...
DFG
2004
Springer
15 years 1 months ago
Modeling and Formal Verification of Production Automation Systems
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wo...