391 search results - page 4 / 79 » Efficient Self-Reconfigurable Implementations Using On-chip ... |
FPL
2007
Springer
15 years 5 months ago
2007
Springer
In this paper, we present a shared instruction and data memory controller for the On-Chip Memory (OCM) bus of the PowerPC embedded in the Virtex-4 chip. The traditional design of ...
DAC
2005
ACM
15 years 1 months ago
2005
ACM
This paper presents an eļ¬cient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory eļ¬...
105
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DAC
2004
ACM
16 years 17 days ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
ENGL
2008
14 years 11 months ago
2008
With the advent of System-On-Chip (SOC) technology, there is a pressing need to enhance the quality of ools available and increase the level of abstraction at which hardware is des...
87
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IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...