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ICAC
2007
IEEE
15 years 3 months ago
SLA Decomposition: Translating Service Level Objectives to System Level Thresholds
In today’s complex and highly dynamic computing environments, systems/services have to be constantly adjusted to meet Service Level Agreements (SLAs) and to improve resource uti...
Yuan Chen, Subu Iyer, Xue Liu, Dejan S. Milojicic,...
FPL
2005
Springer
140views Hardware» more  FPL 2005»
15 years 3 months ago
A Low-Energy FPGA: Architecture Design and Software-Supported Design Flow
The aim of the PhD thesis is the development of systematic methodologies both for hardware and software level for designing low-energy and performance efficient reconfigurable sys...
K. Siozios, Dimitrios Soudris, Adonios Thanailakis
IPPS
2007
IEEE
15 years 3 months ago
Simulating Red Storm: Challenges and Successes in Building a System Simulation
Supercomputers are increasingly complex systems merging conventional microprocessors with system on a chip level designs that provide the network interface and router. At Sandia N...
Keith D. Underwood, Michael Levenhagen, Arun Rodri...
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 3 months ago
A Time Slice Based Scheduler Model for System Level Design
Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
Luciano Lavagno, Claudio Passerone, Vishal Shah, Y...
DAC
2007
ACM
15 years 10 months ago
Parameterized Macromodeling for Analog System-Level Design Exploration
In this paper we propose a novel parameterized macromodeling technique for analog circuits. Unlike traditional macromodels that are only extracted for a small variation space, our...
Jian Wang, Xin Li, Lawrence T. Pileggi