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RSP
2003
IEEE
149views Control Systems» more  RSP 2003»
15 years 5 months ago
Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 5 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
TCIAIG
2010
14 years 6 months ago
The Design of Puzzle Selection Strategies for ESP-Like GWAP Systems
The `Games With A Purpose' (GWAP) genre is a type of `Human Computation' that outsources certain steps of the computational process to humans. Although most GWAP studies ...
Ling-Jyh Chen, Bo-Chun Wang, Wen-Yuan Zhu
TC
2010
14 years 10 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
SAMOS
2004
Springer
15 years 5 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...