Sciweavers

69 search results - page 13 / 14
» Efficient Software Architecture for IPSec Acceleration Using...
Sort
View
CODES
2007
IEEE
14 years 18 days ago
A smart random code injection to mask power analysis based side channel attacks
One of the security issues in embedded system is the ability of an adversary to perform side channel attacks. Power analysis attacks are often very successful, where the power seq...
Jude Angelo Ambrose, Roshan G. Ragel, Sri Paramesw...
CODES
1999
IEEE
13 years 10 months ago
How standards will enable hardware/software co-design
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
Mark Genoe, Christopher K. Lennard, Joachim Kunkel...
FPGA
1995
ACM
118views FPGA» more  FPGA 1995»
13 years 9 months ago
An SBus Monitor Board
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask
DAC
2007
ACM
14 years 7 months ago
Design Methodology for Pipelined Heterogeneous Multiprocessor System
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
Seng Lin Shee, Sri Parameswaran
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
13 years 10 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar