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» Efficient Wire Formats for High Performance Computing
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NOCS
2007
IEEE
15 years 11 months ago
NoC-Based FPGA: Architecture and Routing
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...
Roman Gindin, Israel Cidon, Idit Keidar
145
Voted
ICCV
2009
IEEE
16 years 9 months ago
Mode-Detection via Median-Shift
Median-shift is a mode seeking algorithm that relies on computing the median of local neighborhoods, instead of the mean. We further combine median-shift with Locality Sensitive...
Lior Shapira, Shai Avidan, Ariel Shamir
FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 6 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
IPPS
2010
IEEE
15 years 2 months ago
Measuring properties of molecular surfaces using ray casting
Molecular geometric properties, such as volume, exposed surface area, and occurrence of internal cavities, are important inputs to many applications in molecular modeling. In this ...
Mike Phillips, Iliyan Georgiev, Anna Katharina Deh...
ICIP
2005
IEEE
16 years 6 months ago
Improved schemes for inter-frame coding in the H.264/AVC standard
An efficient algorithm for inter-frame coding in the H.264/AVC standard is extended to provide more significant speedup in computational performance for sequences containing high ...
Andy C. Yu, Graham R. Martin, Heechan Park