Sciweavers

544 search results - page 98 / 109
» Efficient checker processor design
Sort
View
EGH
2010
Springer
14 years 7 months ago
Architecture considerations for tracing incoherent rays
This paper proposes a massively parallel hardware architecture for efficient tracing of incoherent rays, e.g. for global illumination. The general approach is centered around hier...
Timo Aila, Tero Karras
79
Voted
IPPS
2010
IEEE
14 years 7 months ago
pFANGS: Parallel high speed sequence mapping for Next Generation 454-roche Sequencing reads
Millions of DNA sequences (reads) are generated by Next Generation Sequencing machines everyday. There is a need for high performance algorithms to map these sequences to the refer...
Sanchit Misra, Ramanathan Narayanan, Wei-keng Liao...
ICCV
2009
IEEE
14 years 7 months ago
Realtime background subtraction from dynamic scenes
This paper examines the problem of moving object detection. More precisely, it addresses the difficult scenarios where background scene textures in the video might change over tim...
Li Cheng, Minglun Gong
DPHOTO
2010
176views Hardware» more  DPHOTO 2010»
14 years 11 months ago
Low-cost space-varying FIR filter architecture for computational imaging systems
Recent research demonstrates the advantage of designing electro-optical imaging systems by jointly optimizing the optical and digital subsystems. The optical systems designed usin...
Guotong Feng, Mohammed Shoaib, Edward L. Schwartz,...
APSCC
2010
IEEE
14 years 7 months ago
A Multicore-Aware Runtime Architecture for Scalable Service Composition
Middleware for web service orchestration, such as runtime engines for executing business processes, workflows, or web service compositions, can easily become performance bottleneck...
Daniele Bonetta, Achille Peternier, Cesare Pautass...