555 search results - page 39 / 111 » Efficient event-driven simulation of parallel processor arch... |
PPOPP
2006
ACM
15 years 3 months ago
2006
ACM
Large-scale simulations and computational modeling using molecular dynamics (MD) continues to make significant impacts in the field of biology. It is well known that simulations...
HPCA
2006
IEEE
15 years 10 months ago
2006
IEEE
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
80
Voted
DAC
2002
ACM
15 years 11 months ago
2002
ACM
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
DAC
2008
ACM
15 years 11 months ago
2008
ACM
The relative decline of single-threaded processor performance, coupled with the ongoing shift towards on chip parallelism requires that CAD applications run efficiently on paralle...
IISWC
2008
IEEE
15 years 4 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...