555 search results - page 3 / 111 » Efficient event-driven simulation of parallel processor arch... |
141
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ISCA
1992
IEEE
15 years 5 months ago
1992
IEEE
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
131
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WWW
2005
ACM
16 years 2 months ago
2005
ACM
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
118
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HPCA
2001
IEEE
16 years 2 months ago
2001
IEEE
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
110
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IPPS
1996
IEEE
15 years 6 months ago
1996
IEEE
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
105
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HPCA
2005
IEEE
15 years 7 months ago
2005
IEEE
This paper provides a background and rationale for some of the architecture and design decisions in the Cell processor, a processor optimized for compute-intensive and broadband r...