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ISCA
2006
IEEE
130views Hardware» more  ISCA 2006»
14 years 10 months ago
Area-Performance Trade-offs in Tiled Dataflow Architectures
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
Steven Swanson, Andrew Putnam, Martha Mercaldi, Ke...
PDP
2009
IEEE
15 years 4 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
ENVSOFT
2008
120views more  ENVSOFT 2008»
14 years 10 months ago
Extension and evaluation of sensitivity analysis capabilities in a photochemical model
The decoupled direct method in three dimensions (DDM-3D) provides an efficient and accurate approach for probing the sensitivity of atmospheric pollutant concentrations to various...
S. L. Napelenok, D. S. Cohan, M. T. Odman, S. Tons...
PPOPP
2009
ACM
15 years 10 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
IPPS
2010
IEEE
14 years 8 months ago
Improving the performance of Uintah: A large-scale adaptive meshing computational framework
Abstract--Uintah is a highly parallel and adaptive multiphysics framework created by the Center for Simulation of Accidental Fires and Explosions in Utah. Uintah, which is built up...
Justin Luitjens, Martin Berzins