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JEC
2006
88views more  JEC 2006»
14 years 9 months ago
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
John Oliver, Ravishankar Rao, Diana Franklin, Fred...
DATE
2010
IEEE
160views Hardware» more  DATE 2010»
15 years 2 months ago
Soft error-aware design optimization of low power and time-constrained embedded systems
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu...
EUC
2004
Springer
15 years 3 months ago
Embedded System Design for Network Time Synchronization
Every computer needs a timer mechanism to keep track of current time and also for various accounting purposes such as calculating the time spent by a process in CPU utilization, di...
So-Young Hwang, Dong-Hui Yu, Ki-Joune Li
ICIP
1999
IEEE
15 years 11 months ago
Image Coding Using Vector-Embedded Karhunen-Loeve Transform
In this paper, the theory and the design of a new class of orthogonal transforms are presented. The novel transform is derived from a correlation matrix in which an arbitrary orth...
Toshihisa Tanaka, Yukihiko Yamashita
MJ
2006
145views more  MJ 2006»
14 years 9 months ago
A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems
In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity ...
Michalis D. Galanis, Athanasios Milidonis, Athanas...