Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
Many wireless sensor nodes (motes) interface with slow peripheral devices, requiring the processor to wait. These delays waste time, energy and power, which are valuable but limit...
Individual Data Processing Units (DPUs) are commonly used for operational control and specific data processing of scientific space instruments. To overcome the limitations of trad...
An address table relates k different registered vectors to the addresses from 1 to k. An address generation function represents the address table. This paper presents a realizatio...
Recent advancements in FPGA technology have allowed manufacturers to place general-purpose processors alongside user-configurable logic gates on a single chip. At first glance, ...