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DAC
2006
ACM
15 years 10 months ago
Rapid and low-cost context-switch through embedded processor customization for real-time and control applications
In this paper, we present a methodology for low-cost and rapid context switch for multithreaded embedded processors with realtime guarantees. Context-switch, which involves saving...
Xiangrong Zhou, Peter Petrov
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
15 years 3 months ago
Automatic ADL-based operand isolation for embedded processors
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...
Anupam Chattopadhyay, B. Geukes, David Kammler, Er...
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
15 years 3 months ago
Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
Alexey Lopich, Piotr Dudek
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
15 years 4 months ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
CODES
2001
IEEE
15 years 1 months ago
RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors
The paper proposes a novel software-pipelining algorithm, Register Sensitive Force Directed Retiming Algorithm (RSFDRA), suitable for optimizing compilers targeting embedded VLIW ...
Cagdas Akturan, Margarida F. Jacome