1957 search results - page 64 / 392 » Embedded Processor Security |
JEC
2006
14 years 9 months ago
2006
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...
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SAMOS
2010
Springer
14 years 8 months ago
2010
Springer
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
RTCSA
1999
IEEE
15 years 2 months ago
1999
IEEE
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
MMSEC
2006
ACM
15 years 3 months ago
2006
ACM
In this paper, we study the trade-off in steganography between the number of embedding changes and their amplitude. We assume that each element of the cover image is assigned a sc...
EDCC
1994
Springer
15 years 1 months ago
1994
Springer
A new control flow checking scheme, based on assigned-signature checking by a watchdog processor, is presented. This scheme is suitable for a multitasking, multiprocessor environme...