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DAC
1999
ACM
15 years 6 months ago
Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. ...
DATE
2004
IEEE
181views Hardware» more  DATE 2004»
15 years 6 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...
ECRTS
2009
IEEE
15 years 7 days ago
Partitioned Fixed-Priority Preemptive Scheduling for Multi-core Processors
Abstract--Energy and thermal considerations are increasingly driving system designers to adopt multi-core processors. In this paper, we consider the problem of scheduling periodic ...
Karthik Lakshmanan, Ragunathan Rajkumar, John P. L...
ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
15 years 11 months ago
Making register file resistant to power analysis attacks
— Power analysis attacks are a type of side-channel attacks that exploits the power consumption of computing devices to retrieve secret information. They are very effective in br...
Shuo Wang, Fan Zhang, Jianwei Dai, Lei Wang, Zhiji...
ASPLOS
1996
ACM
15 years 6 months ago
Exploiting Dual Data-Memory Banks in Digital Signal Processors
Over the past decade, digital signal processors (DSPs) have emerged as the processors of choice for implementing embedded applications in high-volume consumer products. Through th...
Mazen A. R. Saghir, Paul Chow, Corinna G. Lee