1957 search results - page 83 / 392 » Embedded Processor Security |
107
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ISLPED
1999
ACM
15 years 6 months ago
1999
ACM
We propose a technique for reducing the energy required by rmware code to execute on embedded systems. The method is based on the idea of compressing the most commonly executed in...
122
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DAC
1996
ACM
15 years 6 months ago
1996
ACM
Deep sub-micron processing technologies have enabled the implementation of new application-specificembeddedarchitecturesthat integrate multiple software programmable processors (e...
139
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WISES
2004
15 years 3 months ago
2004
-- In this paper a Rapid Prototyping Framework and next steps towards the support for interactive Architecture Exploration based on the SPEAR processor core (Scalable Processor for...
119
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TVLSI
2002
15 years 2 months ago
2002
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
130
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CODES
2008
IEEE
15 years 9 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...