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DATE
2008
IEEE
77views Hardware» more  DATE 2008»
16 years 7 hour ago
Re-Examining the Use of Network-on-Chip as Test Access Mechanism
Existing work on testing NoC-based systems advocates to reuse the on-chip network itself as test access mechanism (TAM) to transport test data to/from embedded cores. While this m...
Feng Yuan, Lin Huang, Qiang Xu
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
16 years 7 hour ago
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
ICASSP
2008
IEEE
15 years 12 months ago
Robust watermarking of 3D skinning mesh animations
This paper presents a novel robust watermarking algorithm for 3D skinning mesh animations by embedding the watermark in skin weights in addition to key frames. This method can be ...
Rakhi Motwani, Ameya Ambardekar, Mukesh Motwani, F...
HASE
2007
IEEE
15 years 12 months ago
Pattern-Based Modeling and Analysis of Failsafe Fault-Tolerance in UML
In order to facilitate incremental modeling and analysis of fault-tolerant embedded systems, we introduce an object analysis pattern, called the detector pattern, that provides a ...
Ali Ebnenasir, Betty H. C. Cheng
IPPS
2007
IEEE
15 years 12 months ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...