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» Embedded System Design for Network Time Synchronization
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DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 8 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
16 years 4 days ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim
DATE
2004
IEEE
143views Hardware» more  DATE 2004»
15 years 7 months ago
Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications
Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of the cost/coverage trade-offs of fault-tolerant solutions. This fu...
Claudio Pinello, Luca P. Carloni, Alberto L. Sangi...
IPPS
1998
IEEE
15 years 7 months ago
Measuring the Vulnerability of Interconnection Networks in Embedded Systems
Studies of the fault-tolerance of graphs have tended to largely concentrate on classical graph connectivity. This measure is very basic, and conveys very little information for des...
Vijay Lakamraju, Zahava Koren, Israel Koren, C. Ma...
EMSOFT
2006
Springer
15 years 7 months ago
Modeling a system controller for timing analysis
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Stephan Thesing