855 search results - page 4 / 171 » Embedded core testing using genetic algorithms |
DFT
2009
IEEE
14 years 1 months ago
2009
IEEE
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
ICCAD
2007
IEEE
13 years 10 months ago
2007
IEEE
Abstract-- In this paper, we propose a novel test data compression technique named CacheCompress, which combines selective encoding and dynamic dictionary based encoding. Depending...
ICCD
2004
IEEE
14 years 3 months ago
2004
IEEE
This paper introduces a new method for deterministic diagnosis of logic cores. The proposed method is based on onchip decompression and comparison of incompletely specified test ...
DAC
2000
ACM
14 years 7 months ago
2000
ACM
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
DATE
2006
IEEE
14 years 10 days ago
2006
IEEE
A concurrent core test approach is proposed to reduce the test cost of SOC. Multiple cores in SOC can be tested simultaneously by using a shared test set and scan chain disable. P...