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» Emerging power management tools for processor design
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MJ
2006
89views more  MJ 2006»
14 years 9 months ago
RTDT: A static QoS manager, RT scheduling, HW/SW partitioning CAD tool
The Hardware (HW)/Software (SW) partitioning/scheduling relies on two subtasks : the cost function and the real time (RT) analysis. Besides these two subtasks, the proposed generi...
Hedi Tmar, Jean-Philippe Diguet, Abdenour Azzedine...
FPL
2006
Springer
147views Hardware» more  FPL 2006»
15 years 1 months ago
Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
DATE
2007
IEEE
92views Hardware» more  DATE 2007»
15 years 4 months ago
Dynamic power management under uncertain information
This paper tackles the problem of dynamic power management (DPM) in nanoscale CMOS design technologies that are typically affected by increasing levels of process, voltage, and te...
Hwisung Jung, Massoud Pedram
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
15 years 4 months ago
Implementing the Best Processor Cores
It is well-known that varying architectural, technological and implementation aspects of embedded microprocessors, such as ARM, can produce widely differing performance and power ...
Vamsi Boppana, Rahoul Varma, S. Balajee
89
Voted
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 3 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks