395 search results - page 10 / 79 » Encoding Algorithms for Logic Synthesis |
EMSOFT
2011
Springer
13 years 9 months ago
2011
Springer
Given a multi-modal dynamical system, optimal switching logic synthesis involves generating conditions for switching between the system modes such that the resulting hybrid system...
GLVLSI
2008
IEEE
15 years 4 months ago
2008
IEEE
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
103
click to vote
CAV
2010
Springer
14 years 9 months ago
2010
Springer
ABC is a public-domain system for logic synthesis and formal verification of binary logic circuits appearing in synchronous hardware designs. ABC combines scalable logic transforma...
JCM
2008
14 years 9 months ago
2008
With the feature size of semiconductor technology reducing and intellectual properties (IP) cores increasing, on chip communication architectures have a great influence on the perf...
CASES
2001
ACM
15 years 1 months ago
2001
ACM
We describe a digital circuit synthesis algorithm specialized for the domain of pattern matching circuits implemented in reconfigurable logic. We propose to use this algorithm as ...