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ISLPED
1999
ACM
100views Hardware» more  ISLPED 1999»
15 years 11 months ago
Selective instruction compression for memory energy reduction in embedded systems
We propose a technique for reducing the energy required by rmware code to execute on embedded systems. The method is based on the idea of compressing the most commonly executed in...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...
RTCSA
1999
IEEE
15 years 11 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl
DEXAW
2004
IEEE
132views Database» more  DEXAW 2004»
15 years 10 months ago
Using Data-Flow Analysis for Resilience and Result Checking in Peer-To-Peer Computations
To achieve correct execution of peer-to-peer applications on non-reliable resources, we present a portable and distributed algorithm that provides fault tolerance and result checki...
Samir Jafar, Sébastien Varrette, Jean-Louis...
EDCC
2006
Springer
15 years 10 months ago
Dynamic Derivation of Application-Specific Error Detectors and their Implementation in Hardware
- This paper proposes a novel technique for preventing a wide range of data errors from corrupting the execution of applications. The proposed technique enables automated derivatio...
Karthik Pattabiraman, Giacinto Paolo Saggese, Dani...
CCGRID
2003
IEEE
15 years 10 months ago
Kernel Level Speculative DSM
Interprocess communication (IPC) is ubiquitous in today's computing world. One of the simplest mechanisms for IPC is shared memory. We present a system that enhances the Syst...
Cristian Tapus