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131
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DFT
2006
IEEE
130views VLSI» more  DFT 2006»
15 years 8 months ago
Off-Chip Control Flow Checking of On-Chip Processor-Cache Instruction Stream
Control flow checking (CFC) is a well known concurrent checking technique for ensuring that a program’s instruction execution sequence follows permissible paths. Almost all CFC...
Federico Rota, Shantanu Dutt, Sahithi Krishna
121
Voted
ISPASS
2006
IEEE
15 years 8 months ago
Critical path analysis of the TRIPS architecture
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
Ramadass Nagarajan, Xia Chen, Robert G. McDonald, ...
136
Voted
ASPLOS
2006
ACM
15 years 8 months ago
Temporal search: detecting hidden malware timebombs with virtual machines
Worms, viruses, and other malware can be ticking bombs counting down to a specific time, when they might, for example, delete files or download new instructions from a public we...
Jedidiah R. Crandall, Gary Wassermann, Daniela A. ...
115
Voted
ASPLOS
2006
ACM
15 years 8 months ago
Tradeoffs in transactional memory virtualization
For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems s...
JaeWoong Chung, Chi Cao Minh, Austen McDonald, Tra...
130
Voted
APCSAC
2005
IEEE
15 years 8 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi