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» Energy estimation for 32-bit microprocessors
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CODES
2000
IEEE
15 years 5 months ago
Energy estimation for 32-bit microprocessors
ר Ñ Ø ÓÒ Ó ×Ó ØÛ Ö ÔÓÛ Ö ÓÒ×ÙÑÔØ ÓÒ × ÓÑ Ò ÓÒ Ó Ø Ñ ÓÖ ÔÖÓ Ð Ñ× ÓÖ Ñ ÒÝ Ñ ÔÔÐ Ø ÓÒ׺ Ì Ô Ô Ö ÔÖ × ÒØ× ÒÓÚ Ð ...
Carlo Brandolese, William Fornaciari, Fabio Salice...
125
Voted
TCAD
2002
158views more  TCAD 2002»
15 years 23 days ago
Static power modeling of 32-bit microprocessors
The paper presents a novel strategy aimed at modelling instruction energy consumption of 32-bits microprocessors. Differently from former approaches, the proposed instruction-level...
Carlo Brandolese, Fabio Salice, William Fornaciari...
95
Voted
ARITH
2003
IEEE
15 years 6 months ago
Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders
In this paper, we motivate the concept of comparing VLSI adders based on their energy-delay trade-offs and present a technique for estimating the energy-delay space of various hig...
Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao,...
120
Voted
FCCM
2002
IEEE
119views VLSI» more  FCCM 2002»
15 years 6 months ago
Using On-Chip Configurable Logic to Reduce Embedded System Software Energy
We examine the energy savings possible by re-mapping critical software loops from a microprocessor to configurable logic appearing on the same-chip in commodity chips now commerci...
Greg Stitt, Brian Grattan, Jason R. Villarreal, Fr...
95
Voted
ICCAD
2001
IEEE
128views Hardware» more  ICCAD 2001»
15 years 10 months ago
An Assembly-Level Execution-Time Model for Pipelined Architectures
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...