114 search results - page 10 / 23 » Energy-efficient FPGA interconnect design |
ANCS
2009
ACM
14 years 7 months ago
2009
ACM
Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and ...
JEC
2006
14 years 9 months ago
2006
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
ICCAD
1994
IEEE
15 years 1 months ago
1994
IEEE
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
JSA
2010
14 years 4 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
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ISLPED
2010
ACM
14 years 9 months ago
2010
ACM
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...