114 search results - page 13 / 23 » Energy-efficient FPGA interconnect design |
124
Voted
HOTNETS
2010
14 years 8 months ago
2010
Full-bandwidth connectivity between all servers of a data center may be necessary for all-to-all traffic patterns, but such interconnects suffer from high cost, complexity, and en...
106
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ARC
2007
Springer
15 years 8 months ago
2007
Springer
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identic...
110
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FCCM
1998
IEEE
15 years 6 months ago
1998
IEEE
ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
111
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ISCAS
2007
IEEE
15 years 8 months ago
2007
IEEE
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
111
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FPGA
2009
ACM
15 years 8 months ago
2009
ACM
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...