17 search results - page 3 / 4 » Energy-efficient dynamic circuit design in the presence of c... |
IOLTS
2006
IEEE
14 years 8 days ago
2006
IEEE
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
ISQED
2003
IEEE
13 years 11 months ago
2003
IEEE
- This paper investigates important problems involved in the design of a CML buffer as well as a chain of tapered CML buffers. A new design procedure to systematically design a cha...
GLVLSI
2006
IEEE
14 years 9 days ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
DAC
1998
ACM
14 years 7 months ago
1998
ACM
Phase noise is a topic of theoretical and practical interest in electronic circuits, as well as in other fields such as optics. Although progress has been made in understanding th...
TVLSI
2010
13 years 28 days ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...