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103
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CODES
2009
IEEE
15 years 4 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
100
Voted
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
15 years 9 months ago
From molecular interactions to gates: a systematic approach
The continuous minituarization of integrated circuits may reach atomic scales in a couple of decades. Some researchers have already built simple computation engines by manipulatin...
Josep Carmona, Jordi Cortadella, Yousuke Takada, F...
95
Voted
ACSC
2006
IEEE
15 years 6 months ago
Pruning subscriptions in distributed publish/subscribe systems
Publish/subscribe systems utilize filter algorithms to determine all subscriptions matching incoming event messages. To distribute such services, subscriptions are forwarded to s...
Sven Bittner, Annika Hinze
115
Voted
ICML
2007
IEEE
16 years 1 months ago
Full regularization path for sparse principal component analysis
Given a sample covariance matrix, we examine the problem of maximizing the variance explained by a particular linear combination of the input variables while constraining the numb...
Alexandre d'Aspremont, Francis R. Bach, Laurent El...
118
Voted
ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
13 years 3 months ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek