26 search results - page 3 / 6 » Enhancing FPGA Performance for Arithmetic Circuits |
109
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DAC
2005
ACM
16 years 5 months ago
2005
ACM
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
129
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DAC
1996
ACM
15 years 8 months ago
1996
ACM
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
123
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FPGA
2007
ACM
15 years 10 months ago
2007
ACM
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
170
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FPGA
2001
ACM
15 years 9 months ago
2001
ACM
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
116
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FPGA
2005
ACM
15 years 10 months ago
2005
ACM
This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be p...