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ICCD
2004
IEEE
111views Hardware» more  ICCD 2004»
16 years 2 months ago
Power-Aware Deterministic Block Allocation for Low-Power Way-Selective Cache Structure
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
Jung-Wook Park, Gi-Ho Park, Sung-Bae Park, Shin-Du...
ICCAD
2006
IEEE
126views Hardware» more  ICCAD 2006»
16 years 1 months ago
Exploring linear structures of critical path delay faults to reduce test efforts
It has been shown that the delay of a target path can be composed linearly of other path delays. If the later paths are robustly testable (with known delay values), the target pat...
Shun-Yen Lu, Pei-Ying Hsieh, Jing-Jia Liou
141
Voted
IDA
2009
Springer
15 years 11 months ago
Learning Natural Image Structure with a Horizontal Product Model
We present a novel extension to Independent Component Analysis (ICA), where the data is generated as the product of two submodels, each of which follow an ICA model, and which comb...
Urs Köster, Jussi T. Lindgren, Michael Gutman...
IPPS
2007
IEEE
15 years 11 months ago
Effects of Replica Placement Algorithms on Performance of structured Overlay Networks
In DHT-based P2P systems, Replication-based content distribution and load balancing strategies consists of such decisions as which files should be replicated, how many replicas sh...
Bassam A. Alqaralleh, Chen Wang, Bing Bing Zhou, A...
IPPS
2006
IEEE
15 years 11 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud...