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ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Compiler based exploration of DSP energy savings by SIMD operations
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
Markus Lorenz, Peter Marwedel, Thorsten Dräge...
CODES
2006
IEEE
15 years 5 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...
CCR
2010
203views more  CCR 2010»
14 years 12 months ago
Minimizing energy consumptions in wireless sensor networks via two-modal transmission
We present a sophisticated framework to systematically explore the temporal correlation in environmental monitoring wireless sensor networks. The presented framework optimizes los...
Yao Liang, Wei Peng
DAC
1999
ACM
16 years 21 days ago
Cycle-Accurate Simulation of Energy Consumption in Embedded Systems
This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. 1 instruction-level cycle-accurate simulator is extended wi...
Tajana Simunic, Luca Benini, Giovanni De Micheli
ASPDAC
2008
ACM
97views Hardware» more  ASPDAC 2008»
15 years 1 months ago
A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt