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DATE
2006
IEEE
123views Hardware» more  DATE 2006»
15 years 11 months ago
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
Joseph D'Errico, Wei Qin
HPCC
2005
Springer
15 years 10 months ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
126
Voted
SIES
2007
IEEE
15 years 11 months ago
Real-time characteristics of Switched Ethernet for "1553B"-Embedded Applications: Simulation and Analysis
In our previous work [1], Full Duplex Switched Ethernet was put forward as an attractive candidate to replace the MIL-STD 1553B data bus, in next generation "1553B"embedd...
Ahlem Mifdaoui, Fabrice Frances, Christian Fraboul
DAC
2006
ACM
16 years 6 months ago
A new hybrid FPGA with nanoscale clusters and CMOS routing
In this paper we propose a hybrid FPGA using nanoscale clusters with an architecture similar to clusters of traditional CMOS FPGAs. The proposed cluster is made of a crossbar of n...
Reza M. Rad, Mohammad Tehranipoor
CLUSTER
2008
IEEE
15 years 11 months ago
Gather-arrange-scatter: Node-level request reordering for parallel file systems on multi-core clusters
—Multiple processors or multi-core CPUs are now in common, and the number of processes running concurrently is increasing in a cluster. Each process issues contiguous I/O request...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa