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ICASSP
2011
IEEE
14 years 1 months ago
Exploring implicit score normalization techniques in speaker verification
In this paper we first introduce four kinds of modification of Symmetric Scoring [1] which produce likelihood ratios that do not need to be explicitly normalized, i.e. T-norm, Z...
Ce Zhang, Rong Zheng, Bo Xu
ASAP
2004
IEEE
171views Hardware» more  ASAP 2004»
15 years 1 months ago
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
In this paper, we present a modular co-synthesis framework called CHARMED that solves the problem of hardware-software co-synthesis of periodic, multi-mode, distributed, embedded ...
Vida Kianzad, Shuvra S. Bhattacharyya
TPDS
1998
64views more  TPDS 1998»
14 years 9 months ago
Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors
—Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its perfor...
Steven Wallace, Nader Bagherzadeh
ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
13 years 5 days ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
GECCO
2005
Springer
129views Optimization» more  GECCO 2005»
15 years 3 months ago
Evolutionary change in developmental timing
This paper presents a mutation-based evolutionary algorithm that evolves genotypic genes for regulating developmental timing of phenotypic values. The genotype sequentially genera...
Kei Ohnishi, Kaori Yoshida