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» Evaluation of Parallel Logic Simulation Using DVSIM
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ICPP
2003
IEEE
15 years 5 months ago
A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
Xiaotong Zhuang, Hsien-Hsin S. Lee
ASPLOS
2009
ACM
16 years 9 days ago
Capo: a software-hardware interface for practical deterministic multiprocessor replay
While deterministic replay of parallel programs is a powerful technique, current proposals have shortcomings. Specifically, software-based replay systems have high overheads on mu...
Pablo Montesinos, Matthew Hicks, Samuel T. King, J...
HPDC
2008
IEEE
15 years 6 months ago
Improving peer connectivity in wide-area overlays of virtual workstations
Self-configuring virtual networks rely on structured P2P routing to provide seamless connectivity among nodes through overlay routing of virtual IP packets, support decentralized...
Arijit Ganguly, P. Oscar Boykin, David Wolinsky, R...
ICDCS
2007
IEEE
15 years 6 months ago
LagOver: Latency Gradated Overlays
We propose a new genre of overlay network for disseminating information from popular but resource constrained sources. We call this communication primitive as Latency Gradated Ove...
Anwitaman Datta, Ion Stoica, Michael J. Franklin
IPPS
2006
IEEE
15 years 5 months ago
k-anycast routing schemes for mobile ad hoc networks
— Anycast is a communication paradigm that was first introduced to the suit of routing protocols in IPv6 networks. In anycast, a packet is intended to be delivered to one of the...
Bing Wu, Jie Wu