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» Evaluation of Parallel Logic Simulation Using DVSIM
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ISCA
1992
IEEE
125views Hardware» more  ISCA 1992»
15 years 7 months ago
Limits of Control Flow on Parallelism
This paper discusses three techniques useful in relaxing the constraints imposed by control flow on parallelism: control dependence analysis, executing multiple flows of control s...
Monica S. Lam, Robert P. Wilson
DAC
2010
ACM
15 years 3 months ago
RAMP gold: an FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yun...
131
Voted
SIGARCH
2008
94views more  SIGARCH 2008»
15 years 3 months ago
Parallelization, performance analysis, and algorithm consideration of Hough transform on chip multiprocessors
This paper presents a parallelization framework for emerging applications on the future chip multiprocessors (CMPs). With the continuing prevalence of CMP and the number of on-die...
Wenlong Li, Yen-Kuang Chen
IPPS
2007
IEEE
15 years 9 months ago
Rethinking Automated Synthesis of MPSoC Architectures
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
Brett H. Meyer, Donald E. Thomas
MCS
2007
Springer
15 years 3 months ago
Parallel unstructured mesh generation by an advancing front method
Mesh generation is a critical step in high fidelity computational simulations. High-quality and high-density meshes are required to accurately capture the complex physical phenome...
Yasushi Ito, Alan M. Shih, Anil K. Erukala, Bharat...