An algorithm for technology mapping of combinational and sequential logic networks is proposed and applied to mapping into K-input lookup-tables (K-LUTs). The new algorithm avoids...
Alan Mishchenko, Sungmin Cho, Satrajit Chatterjee,...
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
Josep Carmona, Jordi Cortadella, Victor Khomenko, ...
Abstract— We study the problem of designing control strategies for nondeterministic transitions systems enforcing the satisfaction of Linear Temporal Logic (LTL) formulas over th...
We introduce a stochastic model that describes the quasistatic dynamics of an electric transmission network under perturbations introduced by random load fluctuations, random rem...
Marian Anghel, Kenneth A. Werley, Adilson E. Motte...
Abstract. Dynamic fault trees (DFTs) are a versatile and common formalism to model and analyze the reliability of computer-based systems. This paper presents a formal semantics of ...