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ISCA
2006
IEEE
15 years 5 months ago
2006
IEEE
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
125
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HPCA
1998
IEEE
15 years 4 months ago
1998
IEEE
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...
131
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MICRO
1996
IEEE
15 years 3 months ago
1996
IEEE
The Java bytecode language is emerging as a software distribution standard. With major vendors committed to porting the Java run-time environment to their platforms, programs in J...
143
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HPCA
2006
IEEE
16 years 1 days ago
2006
IEEE
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
105
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CP
2008
Springer
15 years 1 months ago
2008
Springer
The Cell BE processor provides both scalable computation power and flexibility, and it is already being adopted for many computational intensive applications like aerospace, defens...