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150
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CODES
2010
IEEE
15 years 1 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
166
Voted
ASPLOS
2011
ACM
14 years 7 months ago
Inter-core prefetching for multicore processors using migrating helper threads
Multicore processors have become ubiquitous in today’s systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications ...
Md Kamruzzaman, Steven Swanson, Dean M. Tullsen
209
Voted
SIGMOD
2006
ACM
114views Database» more  SIGMOD 2006»
16 years 3 months ago
Integrating compression and execution in column-oriented database systems
Column-oriented database system architectures invite a reevaluation of how and when data in databases is compressed. Storing data in a column-oriented fashion greatly increases th...
Daniel J. Abadi, Samuel Madden, Miguel Ferreira
109
Voted
CSSE
2008
IEEE
15 years 10 months ago
Generation of Executable Representation for Processor Simulation with Dynamic Translation
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
Jiajia Song, HongWei Hao, Claude Helmstetter, Vani...
110
Voted
LFP
1994
87views more  LFP 1994»
15 years 5 months ago
An Efficient Implementation of Multiple Return Values in Scheme
This paper describes an implementation of the new Scheme multiple values interface. The implementation handles multiple values efficiently, with no run-time overhead for normal ca...
J. Michael Ashley, R. Kent Dybvig