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LCTRTS
2007
Springer
15 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
DAC
2009
ACM
15 years 10 months ago
Optimal static WCET-aware scratchpad allocation of program code
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
Heiko Falk, Jan C. Kleinsorge
FASE
2008
Springer
14 years 11 months ago
Language-Based Optimisation of Sensor-Driven Distributed Computing Applications
In many distributed computing paradigms, especially sensor networks and ubiquitous computing but also grid computing and web services, programmers commonly tie their application to...
Jonathan J. Davies, Alastair R. Beresford, Alan My...
ASPLOS
2011
ACM
14 years 1 months ago
RCDC: a relaxed consistency deterministic computer
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ce...
PLDI
1996
ACM
15 years 1 months ago
Fast, Effective Dynamic Compilation
Dynamic compilation enables optimizations based on the values of invariant data computed at run-time. Using the values of these runtime constants, a dynamic compiler can eliminate...
Joel Auslander, Matthai Philipose, Craig Chambers,...