929 search results - page 135 / 186 » Execution architectures for program algebra |
103
click to vote
IEEEPACT
2000
IEEE
15 years 4 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
121
click to vote
APCSAC
2007
IEEE
15 years 6 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper proposes the study of a new computation model that attempts to address the underlying sources of performance degradation (e.g. latency, overhead, and starvation) and th...
109
click to vote
SP
2003
IEEE
15 years 5 months ago
2003
IEEE
We specify a hardware architecture that supports tamper-resistant software by identifying an “idealized” hich gives the abstracted actions available to a single user program. ...
116
click to vote
CASES
2007
ACM
15 years 3 months ago
2007
ACM
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...